Constraint-Aware Automation in VLSI PnR WorkflowsUsing Scripting and Machine Learning
DOI:
https://doi.org/10.14419/36hxfw39Published
19-05-2026Keywords:
Constraint-Aware Automation; VLSI Physical Design; Placement and Routing (PnR); Machine Learning in EDA; Scripting-Based Design Optimization.Abstract
The growing complexity and size of current VLSI designs have resulted in the placement and routing (PnR) steps of the design flow being highly constrained and time-consuming. Traditional manual constraint definition, validation, and iterative design refinements that are needed to close the design are a major setback on the timeline of design closure. This paper describes the in-depth analysis of constraint-conscious automation of VLSI PnR workflows using scripting and machine learning based models. The discussed methodology utilizes both custom scripting, in terms of Tcl and Python, and physical design tools, to mechanize the extraction, verification, and enforcement of physical design constraints through multiple floor-planning and layout iterations. Also, the concept of machine learning is presented to foresee the congestion hotspots, optimize cell positioning, and adjust the routing strategies using the historical design data. The application of supervised learning for congestion estimation and reinforcement learning to legal placement are compared in some of the most popular EDA toolchains. Experimental results indicate that combined scripting-ML can greatly lessen turnaround time, increase the quality of design, and improve turnaround time closure. Also, the framework permits speedy design-space exploration and constraint-re-targeting across projects. The significance of hybrid automation techniques in performing efficient, scalable, and constraint-compliant PnR has been brought out in this research, especially at advanced nodes where the interaction between constraints is highly nonlinear and design margins are very thin.
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