A. Jyotsna K, Satish Kumar P, K. Madhavi B, Swaroopa I. Implementation of 16 Bit SAR ADC in CMOS and sub threshold cml techniques. IJET [Internet]. 2018 Apr. 3 [cited 2024 May 3];7(2.12):257-60. Available from: https://www.sciencepubco.com/index.php/ijet/article/view/11298