Gorabal, Amrutha, and Nayana D K. “FPGA Implementation of UART With Single Error Correction and Double Error Detection (UART-SEC-DED)”. International Journal of Engineering & Technology 7, no. 3.12 (July 20, 2018): 23–27. Accessed May 26, 2024. https://www.sciencepubco.com/index.php/ijet/article/view/15856.