Implementation of a standard inner convolutional codec for DVB-T system using VHDL

  • Authors

    • Dina M. Hussein Modern Academy for Engineering and Technology, Egypt
    • Abdelhalim Zekry
    • Said Baioumy
    • Fatma El-Newagy
    2017-10-04
    https://doi.org/10.14419/ijet.v6i4.8038
  • Channel Coding, Convolutional Coding (Inner Coding), DVB-T, Inner De/ Interleaver, Viterbi Decoder.
  • Forward error correction (FEC) plays a vital role in digital communication systems. DVB-T system uses FEC as a channel coding technique to restore any data lost through transmission to the receiver. DVB-T system uses two levels of error protection. The first level is applied in the data transmitted by using a Reed-Solomon RS (204, 188) code followed by a convolutional interleaver. The other level of error protection is a punctured convolutional inner coding followed by an inner interleave in which the data sequence is rearranged again to minimize the influence of burst errors.

    This paper describes the implementation of inner convolutional codec (Convolutional coder and Viterbi Decoder) and inner de/interleaving of a standard DVB-T system with a constrained length of 7 and a code rate of 2/3 using VHDL on virtex-6 FPGA xc6vlx240t. The designed channel convolutional encoder and Viterbi decoder follow European Standard ETSI EN 300 744 for digital terrestrial television. Verification of the design is accomplished by loop back and by comparison with the corresponding Xilinx core. Utilization and timing re-ports of the implemented device on Vertex 6 are included.

  • References

    1. [1] U. W. E. Ladebusch and C. A. Liss, “Terrestrial DVB ( DVB-T ): A Broadcast Technology for Stationary Portable and Mobile Use,†vol. 94, no. 1, pp. 183–193, 2006.

      [2] V. Nostrand, T. T. Kadota, U. Grenander, J. R. Ragazzini, J. H. Laning, and R. H. Battin, “$ b ( t ) - ml ( t ) 1 dt Error Bounds for Convolutional Codes and an Asymptotically Optimum Decoding Algorithm,†pp. 260–269, 1967.

      [3] W.Fischer, Digital Video and Audio Broadcasting Technology. A Practical Engineering Guide_3rd ed _Springer. 2010. https://doi.org/10.1007/978-3-642-11612-4.

      [4] B. K. Sudharani, B. Dhananjay, J. Praveen, and R. R. A, “Efficient Convolutional Adaptive Viterbi Encoder and Decoder Using RTL Design,†vol. 3, no. 2, pp. 101–105, 2015.

      [5] K. Rajendar and K. Bapayya, “FPGA Implementation of Efficient Viterbi Decoder for Multi-Carrier Systems,†vol. 4, pp. 52–59, 2014.

      [6] Y. Sun, “FPGA Design and Implementation of a Convolutional Encoder and a Viterbi Decoder Based on 802.11a for OFDM,†Wirel. Eng. Technol., vol. 3, no. 3, pp. 125–131, 2012. https://doi.org/10.4236/wet.2012.33019.

      [7] Y. M. Sandesh and K. Rambabu, “Implementation of Convolution Encoder and Viterbi Decoder for Constraint Length 7 and Bit Rate 1 / 2,†Int. J. Eng. Res. Appl., vol. 3, no. 6, pp. 42–46, 2013.

      [8] S. Mishra and R. R. Tripathi, “VDHL Implementation of Viterbi Algorithm for Decoding of Convolutional Code,†Proc. - 2015 Int. Conf. Comput. Intell. Commun. Networks, CICN 2015, no. 1111001, pp. 1367–1370, 2016.

      [9] V. Kavinilavu, S. Salivahanan, V. S. K. Bhaaskaran, S. Sakthikumaran, B. Brindha, and C. Vinoth, “Implementation of convolutional encoder and Viterbi decoder using Verilog HDL,†ICECT 2011 - 2011 3rd Int. Conf. Electron. Comput. Technol., vol. 1, pp. 297–300, 2011. https://doi.org/10.1109/ICECTECH.2011.5941609.

      [10] R. Green, “Forward Error Correction in Digital Television Broadcast,†vol. 270, pp. 1–25, 2008.

      [11] E. B. Union, “En 300 744,†vol. 2, pp. 1–47, 1997.

      [12] M. Elsharief, “Implementing a Standard DVB-T System using MATLAB Simulink,†vol. 98, no. 5, pp. 27–32, 2014.

  • Downloads

  • How to Cite

    Hussein, D. M., Zekry, A., Baioumy, S., & El-Newagy, F. (2017). Implementation of a standard inner convolutional codec for DVB-T system using VHDL. International Journal of Engineering & Technology, 6(4), 131-140. https://doi.org/10.14419/ijet.v6i4.8038