An Improved Multiplication Algorithm

  • Authors

    • S. Subha
    • . .
    2018-10-02
    https://doi.org/10.14419/ijet.v7i4.10.26666
  • multiplication, Binarynumberrepresentation, Lawofindices, Performance
  • Multiplication is commonly used arithmetic operation in computers. An algorithm is proposed to perform multiplication of positive numbers using law of indices. The two inputs  A and B are represented as binary numbers. Iteratively, the number A is multiplied with the bits in B. The coefficients of the partial products are accumulated. These coefficients are represented as binary numbers, the result coefficients are calculated. The proposed algorithm is simulated using Quartus 2 tool for two four bit inputs. An improvement in timing by 18%  with comparable power consumption and increased area is observed for input of four bits. The proposed algorithm can be extended for n-bit inputs.

     

     

     
  • References

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      [7] S Subha, R Sakthivel (2016) A Power Saving Multiplication Algorithm, IJAER, Vol. 11, pp. 6200-6203

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  • How to Cite

    Subha, S., & ., . (2018). An Improved Multiplication Algorithm. International Journal of Engineering & Technology, 7(4.10), 1027-1028. https://doi.org/10.14419/ijet.v7i4.10.26666