Review on Architectures of Motion Estimation for Video Coding Standards

  • Authors

    • Prayline Rajabai C
    • Sivanantham S
    2018-10-02
    https://doi.org/10.14419/ijet.v7i4.10.26629
  • H.264/AVC, H.265/MPEG, Hardware architecture, Motion Estimation, video coding
  • Various video coding standards like H.264 and H.265 are used for video compression and decompression. These coding standards use multiple modules to perform video compression. Motion Estimation (ME) is one of the critical blocks in the video codec which requires extensive computation. Hence it is computationally complex, it critically consumes a massive amount of time to process the video data. Motion Estimation is the process which improves the compression efficiency of these coding standards by determining the minimum distortion between the current frame and the reference frame. For the past two decades, various Motion Estimation algorithms are implemented in hardware and research is still going on for realizing an optimized hardware solution for this critical module. Efficient implementation of ME in hardware is essential for high-resolution video applications such as HDTV to increase the decoding throughput and to achieve high compression ratio. A review and analysis of various hardware architectures of ME used for H.264 and H.265 coding standards is presented in this paper.

     

     

  • References

    1. [1] Alcocer, E., Gutierrez, R., Lopez-Granado, O., Malumbres, M.P., “Design and implementation of an efficient hardware integer motion estimator for an HEVC video encoderâ€, Journal of Real-Time Image Processing, (2016), pp. 1-11.

      [2] AlQaralleh, E.A., Abu-Sharkh, O.M., “Low-complexity motion estimation design using modifed xor functionâ€, Multimedia Tools and Applications, Vol.75, No.24, (2016), pp.16809-16834.

      [3] Cervero, T., Lopez, S., Callico, G., Tobajas, F., De Armas, V., Lopez, J., Sarmiento, R., “Survey of reconfgurable architectures for multimedia applicationsâ€, In Proc. of SPIE: VLSI Circuits and Systems IV, Vol.7363, (2009), pp. 736303/1 – 736303/12.

      [4] Chakrabarti, I., Batta, K.N.S., Chatterjee, S.K., “Motion estimation for video coding- efficient algorithms and architecturesâ€, Springer Book Series: Studies in Computational Intelligence, Vol. 590, (2015), pp. 85-108.

      [5] Chen, C.Y., Chien, S.Y., Huang, Y.W., Chen, T.C., Wang, T.C., Chen, L.G., “Analysis and architecture design of variable block-size motion estimation for h. 264/avcâ€, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol.53, No.3, (2006), pp.578-593.

      [6] Chen, T.C., Chien, S.Y., Huang, Y.W., Tsai, C.H., Chen, C.Y., Chen, T.W., Chen, L.G., “Analysis and architecture design of an hdtv720p 30 frames/s h.264/avc encoderâ€, IEEE Transactions on Circuits and Systems for video technology, Vol.16, No.6, (2006), pp.673-688.

      [7] Compton, K., Hauck, S., “Reconfigurable computing: a survey of systems and softwareâ€, ACM Computing Surveys, Vol.34, No.2, (2002), pp.171-210.

      [8] Deng, L., Gao, W., Hu, M.Z., Ji, Z.Z., “An efficient hardware implementation for motion estimation of avc standardâ€, IEEE Transactions on Consumer Electronics, Vol.51, No.4, (2005), pp.1360-1366.

      [9] He, G., Zhou, D., Li, Y., Chen, Z., Zhang, T., Goto, S., “High-throughput power-efficient vlsi architecture of fractional motion estimation for ultra-hd hevc video encodingâ€, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.23, No.12, (2015), pp.3138-3142.

      [10] Hsia, S.C., Hong, P.Y., “Very large scale integration (vlsi) implementation of low- complexity variable block size motion estimation for h. 264/avc codingâ€, IET Circuits, Devices & Systems, Vol.4, No.5, (2010), pp.414-424.

      [11] Huang, Y.W., Chen, C.Y., Tsai, C.H., Shen, C.F., Chen, L.G., “Survey on block matching motion estimation algorithms and architectures with new resultsâ€, Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, Vol.42, No.3, (2006), pp.297-320.

      [12] Jong, H.M., Chiueh, T.D., et al., “Parallel architectures for 3-step hierarchical search block-matching algorithmâ€, IEEE Transactions on Circuits and Systems for Video Technology, Vol.4, No.4, (1994), pp.407-416.

      [13] Jou, S.Y., Chang, S.J., Chang, T.S., “Fast motion estimation algorithm and design for real time qfhd high efficiency video codingâ€, IEEE Transactions on Circuits and Systems for Video Technology, Vol.25, No.9, (2015), pp.1533-1544.

      [14] Kao, C.Y., Lin, Y.L., “A memory-efficient and highly parallel architecture for variable block size integer motion estimation in h. 264/avcâ€, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.18, No.6, (2010), pp.866-874.

      [15] Kerfa, D., Belbachir, M.F., “Star diamond: an efficient algorithm for fast block matching motion estimation in h264/avc video codecâ€, Multimedia Tools and Applications, Vol.75, No.6, (2016), pp.3161-3175.

      [16] Koga, T., “Motion compensated interframe coding for video-conferencingâ€, In Proc. of National Conference on Telecommunication, (1981), pp. G5.3.1-5.

      [17] Kudo, S., Kitahara, M., Shimizu, A., “Motion vector prediction methods considering prediction continuity in hevcâ€, In Proc. of IEEE Picture Coding Symposium, (2016), pp. 1-5.

      [18] Lam, C.W., Po, L.M., Cheung, C.H., “A new cross-diamond search algorithm for fast block matching motion estimationâ€, In Proc. of IEEE International Conference on Neural Networks and Signal Processing, (2003)., Vol.2, pp.1262-1265.

      [19] Li, R., Zeng, B., Liou, M.L., “A new three-step search algorithm for block motion estimationâ€, IEEE Transactions on Circuits and Systems for Video Technology, Vol.4, No.4, (1994), pp.438-442.

      [20] Lin, J.L., Chen, Y.W., Huang, Y.W., Lei, S.M., “Motion vector coding in the hevc standardâ€, IEEE Journal of Selected Topics in Signal Processing, Vol.7, No.6, (2013), pp.957-968.

      [21] Lin, Y.K., Lin, C.C., Kuo, T.Y., Chang, T.S., “A hardware efficient h. 264/avc motion-estimation design for high-definition videoâ€, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol.55, No.6, (2008), pp.1526-1535.

      [22] Liu, Z., Goto, S., Ikenaga, T., “Optimization of propagate partial sad and sad tree motion estimation hardwired engine for h. 264â€, In Proc. of IEEE International Conference on Computer Design, (2008), pp. 328-333.

      [23] Liu, Z., Song, Y., Shao, M., Li, S., Li, L., Ishiwata, S., Nakagawa, M., Goto, S., Ikenaga, T., “A 1.41 w h. 264/avc real-time encoder soc for hdtv1080pâ€, In Proc. of IEEE Symposium on VLSI Circuits, (2007), pp.12-13.

      [24] Lu, L., McCanny, J.V., Sezer, S., “Reconfigurable system-on-a-chip motion estimation architecture for multi-standard video codingâ€, IET Computers & Digital Techniques, Vol.4, No.5, (2010), pp.349-364.

      [25] Metkar, S., Talbar, S., “Motion estimation techniques for digital video codingâ€, Springer Briefs in Applied Sciences and Technology, (2013), pp. 33-45.

      [26] Mukherjee, R., Mahajan, V., Dhar, A.S., Chakrabarti, I., “High performance visi design of diamond search algorithm for fast motion estimationâ€, Journal of Circuits, Systems and Computers, Vol.25, No.09, (2016), pp.16501-16514.

      [27] Mukherjee, R., Saha, P., Chakrabarti, I., Dutta, P.K., Ray, A.K., “Fast adaptive motion estimation algorithm and its efficient vlsi system for high definition videos†Expert Systems with Applications, Vol.101, (2018), pp.159-175.

      [28] Nalluri, P., Alves, L.N., Navarro, A., “A novel SAD architecture for variable block size motion estimation in hevc video codingâ€, In Proc. of IEEE International Symposium on System on Chip, (2013), pp.1-4.

      [29] Ndili, O., Ogunfunmi, T., “Algorithm and architecture co-design of hardware-oriented, modified diamond search for fast motion estimation in h. 264/avcâ€, IEEE Transactions on Circuits and Systems for Video Technology, Vol.21, No.9, (2011), pp.1214-1227.

      [30] Ng, K.H., Po, L.M., Cheung, K.W., Wong, K.M., “Block-matching translational and rotational motion compensated prediction using interpolated reference frameâ€, EURASIP Journal on Advances in Signal Processing, Vol.2010, (2010), pp.1-9.

      [31] Paramkusam, A.V., Reddy, V., “A novel fast search motion estimation boosted by multilayer conceptâ€, Multimedia Tools and Applications, Vol.75, No.4, (2016), pp.2169-2188.

      [32] Po, L.M., Ma, W.C., “A novel four-step search algorithm for fast block motion estimationâ€, IEEE Transactions on Circuits and Systems for Video Technology, Vol.6, No.3, (1996), pp.313-317.

      [33] Sullivan, G.J., Ohm, J., Han, W.J., Wiegand, T., “Overview of the high efficiency video coding (hevc) standardâ€, IEEE Transactions on Circuits and Systems for Video Technology, Vol.22, No.12, (2012), pp.1649-1668.

      [34] Tham, J.Y., Ranganath, S., Ranganath, M., Kassim, A.A., “A novel unrestricted center-biased diamond search algorithm for block motion estimationâ€, IEEE transactions on Circuits and Systems for Video Technology, Vol.8, No.4, (1998), pp.369-377.

      [35] Thomas, D., Momcilovic, S., Pratas, F., Sousa, L., “Reconfigurable data flow engine for hevc motion estimationâ€, In Proc. of IEEE International Conference on Image Processing, (2014.), pp.1223-1227.

      [36] Tsai, A.C., Bharanitharan, K., Wang, J.F., Lee, K.I., “Effective search point reduction algorithm and its vlsi design for hdtv h. 264/avc variable block size motion estimationâ€, IEEE Transactions on Circuits and Systems for Video Technology, Vol.22, No.7, (2012), pp.981-988.

      [37] Tseng, C.F., Lai, Y.T., Lee, M.J., “A vlsi architecture for three-step search with variable block size motion vectorâ€, In Proc. of IEEE 1st Global Conference on Consumer Electronics, (2012), pp. 628-631.

      [38] Tsung, P.K., Chen, W.Y., Ding, L.F., Tsai, C.Y., Chuang, T.D., Chen, L.G., “Single-iteration full-search fractional motion estimation for quad full HD H.264/AVC encodingâ€, In Proc. of IEEE International Conference on Multimedia and Expo, (2009), pp.9-12.

      [39] Ugur, K., Alshin, A., Alshina, E., Bossen, F., Han, W.J., Park, J.H., Lainema, J., “Motion compensated prediction and interpolation filter design in h. 265/hevcâ€, IEEE Journal of Selected Topics in Signal Processing, Vol.7, No.6, (2013), pp.946-956.

      [40] Vayalil, N.C., Kong, Y., “VLSI architecture of full-search variable-block-size motion estimation for HEVC video encodingâ€, IET Circuits, Devices & Systems, Vol.11, No.6, (2017), pp.543-548.

      [41] Wang, C.C., Li, G.L., “Hardware-friendly advanced motion vector prediction method and its architecture design for high effciency video codingâ€, Multimedia Tools and Applications, Vol.76, No.23, (2017), pp.25285-25296.

      [42] Zhu, S., Ma, K.K., “A new diamond search algorithm for fast block-matching motion estimationâ€, IEEE Transactions on Image Processing, Vol.9, No.2, (2000), pp.287-290.

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  • How to Cite

    Rajabai C, P., & S, S. (2018). Review on Architectures of Motion Estimation for Video Coding Standards. International Journal of Engineering & Technology, 7(4.10), 928-934. https://doi.org/10.14419/ijet.v7i4.10.26629