Last-Mile Post-Route Power Optimization in Integrated Circuit Conception

  • Abstract
  • Keywords
  • References
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  • Abstract

    Power optimization become essential in all the integrated circuit conception phases. During the physical implementation, the requirement is to implement all low power strategies that comes with design from the RTL and logic synthesis. Recently many new techniques for more power reduction were introduced during the physical implementation stage. One of these techniques is post-route power optimization which is performed at the final stage of an integrated circuit conception before the manufacturing. This paper proposes using a model of post-route power optimization technique for a large scope of designs type. Results on complex test-cases shows an important power reduction up to 18% of the total consumed power.



  • Keywords

    Dynamic power, Integrated Circuit conception, leakage power, low power, power optimization, total power.

  • References

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Article ID: 21788
DOI: 10.14419/ijet.v7i4.16.21788

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