Low Power Bus Encoding Schemes to Minimization of Crosstalk in Vlsi Interconnects

Authors

  • N. Chintaiah
  • G. Umamaheswara Reddy

DOI:

https://doi.org/10.14419/ijet.v7i3.29.21396

Keywords:

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Abstract

Data integrity is becoming more challenging task as the technology changes scales down in the direction of Deep Sub Micron (DSM) technology. Interconnects architecture design are now measured the bottleneck in the design of Integrated Circuits. In the DSM technology, a coupling capacitance between interconnects is the foremost factor in the total wire capacitance. The combination effect (capacitance formation) dominates the utilization of energy in the run-instant on chip bus. Bus Encoding is the most commonly used technique to change the data pattern before sending data on the bus it reduces the coupling effect on the bus then cuts the power dissipation. The proposed encoding method is the condition based temporal transition data encoding technique, i.e., upper bit inversion, lower bit inversion, upper-lower bit inversion. By using this encoding techniques, it saves the power and reduces the delay.

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How to Cite

Chintaiah, N., & Umamaheswara Reddy, G. (2018). Low Power Bus Encoding Schemes to Minimization of Crosstalk in Vlsi Interconnects. International Journal of Engineering & Technology, 7(3.29), 644–647. https://doi.org/10.14419/ijet.v7i3.29.21396
Received 2018-10-09
Accepted 2018-10-09