Modelling and Analysis of Novel Topology for Multilevel Inverter With Reduce Number of Switches

 
 
 
  • Abstract
  • Keywords
  • References
  • PDF
  • Abstract


    The demand of quality power is increasing continuously. The problem of global warming and rate of decrease of non-renewable energy sources are increasing day by day. Hence renewable energy sources such as fuel cell, solar, Magneto hydro Dynamic (MHD), geothermal are the best alternatives to solve the problem of environmental issue and increasing demand of energy.  The output of these resources is dc, therefore to connect these resources to the grid, multilevel inverter is the key device. But the output of multilevel inverter has power quality issues such as harmonic generation and notching due to conversion of dc to ac and high number of switch. Hence, this paper deals with harmonic elimination using Genetic Algorithm based Selective Harmonic Elimination (GA-SHE) techniques for asymmetric and symmetric topology of MLI. In the present study, comparative study among the 5-level, 7-level, 9-level, 11-level and 15-level multilevel inverters with reduced number of switches topologies has been discussed. A novel topology of 15-level inverter which consists least number of switches has been designed for a desired voltage level. Also, the comparison of Total harmonic distortion developed in the output voltage generated by different topology at different levels with the proposed 15-level inverter topology are discussed.

     


  • Keywords


    Multilevel Inverter(MLI), Selective Harmonic Elimination(SHE),

  • References


      [1] Shimi Sudha Letha, Tilak Thakur, Jagdish Kumar,“Harmonic elimination of a photo-voltaic based cascaded H-bridge multilevel inverter using PSO (Particle swarm optimization) for induction motor drive” Elsevier, Energy 107(2016),335-346

      [2] Ebrahim Babaei. “A Cascade Multilevel Converter Topology with Reduced Number of Switches”, IEEE Trans. On Power electronics, Vol.23, No.6, November 2008

      [3] P Palanivel, SS Dash. Analysis of THD and output voltage performance for CMLI using carrier PWM. IET Power Electronics Vol. 4, Issue. 8, pp. 951-958

      [4] Balamurugan, C.R., S.P. Natrajan, andR.Basra, “Performance evaluation of unipolar PWM strategies for three phase five level diode clamped inverter”,2012 International Conference on Emerging Trends in ScienceEngineeringAndTechnology (INCOSET),2012

      [5] Farouk Haddji Benali, Fouad AzzOuz, Ghalem Bachir, “The Operating improvement of the Supply Source and the Optimization of PWM Control”, International Journal of Power Electronics and Drives systems (IJPEDS),2015

      [6] Shahrin Md Ayob. “NonSinusoidal PWM Method for Cascaded Multilevel Inverter” TELKOMNIKA. 2012; 10(4): 670-679.

      [7] R Naveen Kumar. “Energy Management system for Hybrid RES with Hybrid Cascaded Multilevel inverter” International Journal of Electrical and Computer Engineering (IJECE). 2014; 4(1): 24~30.

      [8] Kamldeep, Jagdish Kumar, “Switch Reduction and Performance Analysis using Different Modulation Technique in Multilevel Inverter”, ICPEICES-2016

      [9] M.Farhadi Kangarlu,E.Babaei, S.Laali, “Symmetric multilevel inverter with reduced components based on non-insulated dc voltage sources”, IET Power Electronics 2012, Vol. 5,Issue.5,pp 571-581

      [10] BalamuruganM.,Gnana Prakash M.,and umashankar S., “A new seven level symmetric inverter with reduced number of switches and DC sources”, 2014 International conference on Advances in Electrical Engineering(ICAEE),2014

      [11] Won-Kyun choi , “H-Bridge based multilevel inverter using PWm switching function”, INTELEC 2009, 31stInternationalTelecomunicationsEnergyConference,10/2009

      [12] Javad Ebrahimi,Ebrahim Babaei, Govergpetian, “ A New Topology of cascaded Multilavel Converters With Reduced Number of Components for High-Voltage Applications”, IEEE TRANSACTIONSONPOWER ELECTRONICS, Vol.26.No.11,November 2011

      [13] Babaei, E.Hossemi.S.H, “New cascaded multilevel inverter toptolgy with minimum number of switches”, Elsevier J.Energy Convers. Manage ,2009,50(H),PP 2761-2767

      [14] N.Farokhnia,S.H.Fathi,R.Salehi,G.B.Gharehpetian,M.Ehasani,“Improved selective harmonic elimination pulse –width modulation strategy in multilevel inverters”, IET Power Electronics,2012 Vol.5,iss.9,pp.1904-1911

      [15] Albert Alexander,Manigandan Thathan, “Modeling and analysis of modular multilevel converter for solar photovoltaic applications to improve power quality”,IET Renew,Power Gener,2.015 Vol.9

      [16] Sandeep Gupta,Mrs.shimi S.L, Dr.(Mrs.)Lini Mathew, Swati singh, “FPGA Implementation of 3-Ø Solar Powered 5-level Inverter”, IJAESTR,Volume -2,Issue 04 December 2014

      [17] Faizal Arya Samman,Arie Azhari, “DC/AC Power Converter for Home Scale Electricity Systems Powered by Renewable Energy”, IEEE, ICSGTEIS 2016

      [18] Bill Diong, Hossein Sepahvand, keith A, “ Harmonic Distortion Optimization of Cascaded H-Bridge Inverters Considering Device Voltage Drops and Noninteger DC Voltage Ratios” IEEE Transactions on industrial electronics, Vol.60 No,8 August 2013

      [19] Babaei, E.Hosseni, S.H Gharehpetian, G.B. Tarafdar Haque,M.Sabahi, “ reduction of dc voltage sources and switches in asymmetrical multilevel converter using a noval topology”,Elsevier J.Elect, Power syst, Res,2007,77.(8),pp 1073-1085

      [20] Hinago, Y.Koizuami, “ A single phase multilevel inverter using switched series/parallel dc voltage sources”,IEEE Trans. Ind. Electron,2010,58(8),pp 2643-2650

      [21] T.Jagadeeswari,K.Srokrishnasatya,G.Rajkumar,U.S.S.Santhosh Kumar, “Impementiona of Cascaded H-bridge Five Level Inverter With Load”, IRJET,2016 Volume:03 Issue:09/sep-2016

      [22] G.Bhavanaryana ,Chavvakula Swamy,Ganta Mounika, Yedlapallinetaji,Sundru Sri durga, “ Analysis and hardware implementation of five level cascaded H-bridge Inverter”, IJERA,Vol.5 Issue10 (Part 2),October 2015,pp.43-53

      [23] Shuvankar Podder,Md.Multan Biswas,Md.Ziaur Rahman Khan, “ A Modified PWm Technique to Improve Total Harmonic Distortion of Multilevel Invereter”, International Conference on Electrical and Computer Engineering,IEEE,20-22 December,2016, Dhaka,Bangladesh

      [24] S.Harish, Dr.G.Raja Rao, S.N.S.Ravi Kiran, “ Three Phase Multi Level Inverter for High Power Applictions”, ”, International Conference on Electrical, Electronics and Optimization Techniques(ICEEOT)-2016,IEEE

      [25] N.Farokhnia,S.H.Fathi,N.Yousefpoor,M.K.Bakhshizadeh, “Minimization of total harmonic distortion in a cascaded multilevel invereter by regulating voltage of DC”, IET Power Electronics,2012 Vol.5,Iss.1,PP106-114


 

View

Download

Article ID: 20111
 
DOI: 10.14419/ijet.v7i4.5.20111




Copyright © 2012-2015 Science Publishing Corporation Inc. All rights reserved.