Comparison of selective harmonic elimination and SPWM techniques for unipolar inverters

 
 
 
  • Abstract
  • Keywords
  • References
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  • Abstract


    Several modulation schemes are used to operate power electronics devices MOSFETs and IGBTs in power converters and are also utilized to reduce the influence of Total Harmonic Distortion (THD) in the output voltage of these inverters. Selective Harmonic Elimination (SHE) and Sinusoidal Pulse Width Modulation (SPWM) are the most popular techniques used in this regard. Number of notches and modulation index (m) are the important parameters used to design both techniques. Total Harmonic Distortion is utilized as a standard to measure the signal quality for both schemes. This paper discusses a comparison study of using SHE and SPWM techniques in full bridge inverter. MATLAB and PSIM tools are used to estimate and verify the performance of both techniques and the results are obtained experimentally.

     

     


  • Keywords


    Modulation Index; Selective Harmonic Elimination; Sinusoidal Pulse Width Modulation; THD; Unipolar Inverter.

  • References


      [1] Aboadla, E. H. E., Khan, S., Habaebi, M. H., Gunawan, T., Hamidah, B. A., & Tohtayong, M. (2016, December). Selective harmonics elimination technique in single phase unipolar h-bridge inverter. In Research and Development (SCOReD), 2016 IEEE Student Conference on (pp. 1-4). IEEE. https://doi.org/10.1109/SCORED.2016.7810057.

      [2] L. Li, D. Czarkowski, Y. Liu, and P. Pillay, “Multilevel selective harmonic elimination PWM technique in series-connected voltage inverters,” IEEE Trans. Ind. Appl., vol. 36, no. 1, pp. 160–170, 2000. https://doi.org/10.1109/28.821811.

      [3] T. Taufik and M. Mccarty, “Optimization of Operating Parameters in a Unipolar PWM Inverter,” in IEEE Applied Power Electronics Colloquium (IAPEC) Optimization, 2011, pp. 57–62. https://doi.org/10.1109/IAPEC.2011.5779845.

      [4] C. Voltages et al., “Multilevel Inverter Modulation Schemes to Eliminate,” IEEE Trans. Ind. Appl., vol. 36, no. 6, pp. 1645–1653, 2000. https://doi.org/10.1109/28.887217.

      [5] J. Sabarad, “Comparative Analysis of SVPWM and SPWM Techniques for Multilevel Inveter,” 2015 Int. Conf. Power Adv. Control Eng., pp. 232–237, 2015.

      [6] A. P. H. H. R. Jatin A. Patel, “DESIGN OF SINUSOIDAL PULSE WIDTH MODULATION INVERTER,” Int. J. Technol. Res. Eng., vol. 2, no. 8, pp. 1446–1452, 2015.

      [7] A. Hernandez, R. Tapia, O. Aguilar, and A. Garcia, “Comparison of SVPWM and SPWM Techniques for Back to Back Converters in PSCAD,” World Congr. Eng. Comput. Sci. 2013, vol. I, pp. 23–25, 2013.

      [8] Aboadla, E. H. E., Khan, S., Habaebi, M. H., Gunawan, T., Hamidah, B. A., & Yaacob, M. B. (2016, January). Effect of modulation index of pulse width modulation inverter on Total Harmonic Distortion for Sinusoidal. In Intelligent Systems Engineering (ICISE), 2016 International Conference on (pp. 192-196). IEEE. https://doi.org/10.1109/INTELSE.2016.7475119.

      [9] J. Soomro, “Design and Analysis of Single Phase Voltage Source Inverter Using Unipolar and Bipolar Pulse Width Modulation Techniques,” in International Conference on Advances in Electrical, Electronic and System Engineering, 2016, pp. 14–16. https://doi.org/10.1109/ICAEES.2016.7888052.

      [10] K. Chen, S. Ji, and L. Zhang, “Two-level three-phase voltage source inverter fed low-power AC induction motor based on unipolar pulse-width modulation method,” IET Power Electron., vol. 9, pp. 435–440, 2016. https://doi.org/10.1049/iet-pel.2015.0231.

      [11] C. R. T. LAKSHMIPRASANNA, “A Comparative Study of Combined Unipolar and Bipolar PWM with the SVPWM for the Power Quality Improvement,” Int. J. Sci. Eng. Technol. Res., vol. 04, no. 13, pp. 2440–2445, 2015.

      [12] V. Šunde and Z. Ben, “Spectral calculation of the output voltage of an inverter with unipolar pulse width modulation,” MIPRO 2010, pp. 127–131, 2010.

      [13] M. Z. Aihsan; R. B. Ali; J. H. Leong, “Design and Implementation of Single-Phase Modified SHEPWM Unipolar Inverter,” in 2015 IEEE Conference on Energy Conversion (CENCON), 2015, pp. 337–342.

      [14] A. S. Mohamad, “A New Cascaded Multilevel Inverter Topology with Minimum Number of Conducting Switches,” 2014 IEEE Innov. Smart Grid Technol. - Asia (ISGT ASIA) A, pp. 164–169, 2014. https://doi.org/10.1109/ISGT-Asia.2014.6873783.

      [15] C. Buccella, C. Cecati, M. G. Cimoroni, and K. Razi, “Analytical method for pattern generation in five-level cascaded H-bridge inverter using selective harmonic elimination,” IEEE Trans. Ind. Electron., vol. 61, no. 11, pp. 5811–5819, 2014. https://doi.org/10.1109/TIE.2014.2308163.

      [16] M. S. A. Dahidah, G. Konstantinou, and V. G. Agelidis, “A Review of Multilevel Selective Harmonic Elimination PWM: Formulations, Solving Algorithms, Implementation and Applications,” IEEE Trans. Power Electron., vol. 30, no. 8, 2015. https://doi.org/10.1109/TPEL.2014.2355226.

      [17] Aboadla, E. H. E., Khan, S., Habaebi, M. H., Gunawan, T., Hamidah, B. A., & Tohtayong, M. (2016, July). Modulation Optimization Effect on Total Harmonic Distortion of Single Phase H-Bridge Inverter Based Selective Harmonics Elimination Technique. In Computer and Communication Engineering (ICCCE), 2016 International Conference on (pp. 200-203). IEEE.

      [18] M. Srndovic, A. Zhetessov, T. Alizadeh, Y. L. Familiant, G. Grandi, and A. Ruderman, “Simultaneous Selective Harmonic Elimination and THD Minimization for a Single-Phase Multilevel Inverter with Staircase Modulation,” IEEE Trans. Ind. Appl., vol. 54, no. 2, pp. 1532–1541, 2018. https://doi.org/10.1109/TIA.2017.2775178.

      [19] K. Ganesan, K. Barathi, P. Chandrasekar, and D. Balaji, “Selective Harmonic Elimination of Cascaded Multilevel Inverter using BAT algorithm,” Procedia Technol., vol. 21, pp. 651–657, 2015. https://doi.org/10.1016/j.protcy.2015.10.078.

      [20] and Z. L. Sun Xiaofeng; BaochengWang, Yue Zhou; Wei Wang; Huiyuan Du, “A Single DC Source Cascaded Seven-Level Techniques,” IEEE Trans. Ind. Electron., vol. 63, no. 11, pp. 7184–7194, 2016. https://doi.org/10.1109/TIE.2016.2557317.

      [21] M. Ahmed, A. Sheir, and M. Orabi, “Real-Time Solution and Implementation of Selective Harmonic Elimination of Seven-Level Multilevel Inverter,” IEEE J. Emerg. Sel. Top. Power Electron., vol. 5, no. 4, pp. 1700–1709, 2017. https://doi.org/10.1109/JESTPE.2017.2746760.

      [22] N. F. S. H. Fathi and R. S. G. B. Gharehpetian, “Improved selective harmonic elimination pulse-width modulation strategy in multilevel inverters,” IET Power Electron., vol. 5, no. August, pp. 1904–1911, 2012.

      [23] Aboadla, E. H., Aznan, K. A., Tohtayong, M., Khan, S., Hannan, M. A., & Uddin, M. N. (2017, October). Low spikes and low harmonic distortion multilevel inverter for induction motor implementation. In Industry Applications Society Annual Meeting, 2017 IEEE (pp. 1-7). IEEE. https://doi.org/10.1109/IAS.2017.8101760.

      [24] K. Ganesan, K. Barathi, P. Chandrasekar, and D. Balaji, “Selective Harmonic Elimination of Cascaded Multilevel Inverter using BAT algorithm,” Procedia Technol., vol. 21, pp. 651–657, 2015. https://doi.org/10.1016/j.protcy.2015.10.078.


 

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Article ID: 18649
 
DOI: 10.14419/ijet.v7i4.18649




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