Review a Low Power CMOS Charge Pump using Power Gating Techniques to Reduce Leakage Power

  • Authors

    • Vengadeswari N
    • Priscilla Whitin
    2018-08-04
    https://doi.org/10.14419/ijet.v7i3.1.16790
  • Capacitor, Charge pump, Power Gating Techniques, Power leakage, Threshold, Tanner Tools.
  • In most case, charge pump circuit is designed based on capacitor, where voltage is increased at each stage depending on each stage voltage gain. Major elements are all charge pumps circuits one is Pumping capacitors and diode connected MOS.To increases pumping efficiency is very higher for each stage of charge pump circuits. Pumping efficiency are limiting by two parameters one is parasitic capacitance and threshold voltage. The power dissipated from the circuit can be increased by attain of leakage current .To resist this leakage in the circuits the supply voltage is major concern. To reduce the leakage with the help of power gating technique .Charge pump circuits are to be designed and verified by using tanner t-spice tools.

     

  • References

    1. [1] Nan-Xiong Huang1, Miin-Shyue Shiau2, Zong-Han Hsieh3, Hong-Chong Wu4, Don-GeyLiu,â€Improving the Efficiency of Mixed-Structure Charge Pumps by the Multi-Phase Techniqueâ€, 978-1-4244-5046-6/10/2010 IEEE

      [2] Xueqiang Wang, Dong Wu, FengyingQiao, Peng Zhu, Kan Li, Liyang Pan, and Runde Zhou, “A HighEfficiencyCMOS Charge Pump for Low Voltage Operation†IEEE, pp.320-323, 2009.

      [3] Low Power CMOS Start-Up Charge Pump with Power Gating Technique, Articlein InternationalJournal of Scientific and Engineering Research · January 2016ISSN 2319-8885,Vol.04,Issue.52,December-2015. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS 1

      [4] CMOS Startup Charge Pump With Body Bias andBackward Control for Energy HarvestingStep-Up Converters HuanPeng, Nghia Tang, Youngoo Yang, Member, IEEE, and DeukhyounHeo, Senior Member, IEEE.

      [5] P. Chen et al., “0.18-V input charge pump with forward body biasing instartup circuit using 65 nm CMOS,†in Proc. IEEE Custom Int. Circuits.Conf., Sept. 2010, pp. 239–242.

      [6] Y. M. Sun and X. B. Wu, “Subthreshold voltage startup module forstep-up DC-DC converter,†Electron. Lett., vol. 46, pp. 373–374, 2010

      [7] E. J. Carlson et al., “A 20 mV input boost converter with efficient digitalcontrol for thermoelectric energy harvesting,†IEEE J. Solid-StateCircuits, vol. 45, no. 4, pp. 741–750, Apr. 2010.

      [8] Y. O. Ramadass and A. P. Chandrakasan, “A battery-less thermoelectricenergy harvesting interface circuit with 35 mV startupvoltage,â€IEEE J. Solid-State Circuits, vol. 46, no. 1, pp. 333–341, Jan. 2011.

      [9] J. Hollemanet al., “A compact pulse-based charge pump in 0.13 mCMOS,†in Proc. IEEE Custom Int. Circuits Conf., 2007, pp. 381–384.

      [10] A. Worapishet and J. B. Hughes, “Performance enhancement ofswitched-current techniques using subthreshold MOS operation,â€IEEE Trans. Circuits Syst.—I, vol. 55, no. 11, pp. 3582–3592, Dec.2008.

      [11] F. Pan and T. Samaddar, Charge Pump Circuit Design. NewYork:McGraw-Hill, 2006.

      [12] Jazz Semiconductor Design Application Manual. Newport Beach,CA: Jazz Semiconductor Products Inc., 2012.

  • Downloads

  • How to Cite

    N, V., & Whitin, P. (2018). Review a Low Power CMOS Charge Pump using Power Gating Techniques to Reduce Leakage Power. International Journal of Engineering & Technology, 7(3.1), 27-30. https://doi.org/10.14419/ijet.v7i3.1.16790