High performance turbo encoder using mealy FSM state encoding technique

  • Authors

    • E Sujatha
    • Dr C. Subhas
    • Dr M. N. Giri Prasad
    2018-06-08
    https://doi.org/10.14419/ijet.v7i2.33.14163
  • LTE-A Standard, Turbo Encoder, QPP Interleaver, FSM Technique, Look Up Table (LUT), Parallel Architecture.

  • Error-correction Coding plays a vital role to obtain efficient and high quality data transmission, in today’s high speed wireless communication system. Considering the requirement of using high data rates by Long Term Evolution (LTE) system, parallel concatenation of two convolutional encoders were used to design turbo encoder. In this research task a high speed turbo encoder, which is a key component in the transmitter of wireless communication System, with memory based interleaver has been designed and implemented on FPGA for 3rd Generation Partnership Project (3GPP) defined Long Term Evolution – Advanced (LTE-A) standard using Finite state Machine(FSM) encoding technique. Memory based quadratic permutation polynomial (QPP) interleaver shuffles a sequence of binary data and supports any of the 188 block sizes from N= 40 to N= 6144. The proposed turbo encoder is implemented using 28nm CMOS technology and achieved 300 Mbps data rate by using 1% of available total hardware logic. By using the proposed technique, encoded data can be released continuously with the help of two parallel memories to write/read the input using pipelining concept.

     

     

  • References

    1. [1] LTE; Evolved Universal Terrestrial Radio Access (E-UTRA); Multiplexing and channel coding, 3GPP TS 36.212 Version 13.0.0 Release 12, (2015).

      [2] LTE; Evolved Universal Terrestrial Radio Access (E-UTRA); Multiplexing and channel coding. 3GPP TS 36.212 Version 13.0.0 Release 13, (2016).

      [3] Berrou C., Glavieux A., Thitimajshima P.: Near Shannon Limit Error Correcting Coding And Decoding: Turbo Codes. Proc. Int. Conf. Communications, pp. 1064–1070, (1993).

      [4] Berrou C and Glavieux A.: Near Optimum Error Correcting Coding and Decoding: Turbo-codes. IEEE Transactions on Communications, vol. 44, pp. 1261–1271, (1996).

      [5] Stefan S., Stefan W., and Norbert W.: Advanced iterative channel coding schemes: When Shannon meets Moore. Ninth International Symposium on Turbo Codes & Iterative Information Processing, pp. 406-411, (2016).

      [6] Brejza M., Li L., Maunder R.G., Al-Hashimi B., Berrou C., and Hanzo L.: 20 Years of turbo coding and energy-aware design guidelines for energy-constrained wireless applications. IEEE Commn. Surveys & Tutorials, vol. 18, no. 1, pp. 8-28, (2016).

      [7] Ferrari M. and Bellini S.: Rate variable, multi binary turbo codes with controlled error floor. IEEE trans. on common. vol.57, no.5, pp. 1209-1214, (2009).

      [8] Purwita A. A., Setio A., and Adiono T.: Optimized 8-level turbo encoder algorithm and VLSI architecture for LTE. International Conference on Electrical Engineering and Informatics, pp. 17-19, (2011).

      [9] Banerjee S. and Chattopadhyay S.: Design of parallel-concatenated convolution turbo code using harmony search algorithm. International conference on Power, Control and Embedded Systems (ICPCES), pp. 1-6, (2015).

      [10] Santhanam V. and Kabra L.: Optimal low power and scalable memory architecture for turbo encoder. IEEE Conference on Design and Architectures for Signal and Image Processing, pp. 1-8, (2012).

      [11] Banerjee S. and Chattopadhyay S.: Optimum power allocation of parallel-concatenated convolution turbo code using flower pollination algorithm. International conference on control, instrumentation, energy and communication, pp. 516-520, (2016).

      [12] Yang X.: Flower Pollination Algorithm for Global Optimization. Unconventional Computation and Natural Computation Lecture Notes in Computer Science, vol. 7445, pp. 240-249, (2012).

      [13] Sun J. and Takeshita O. Y.: Interleavers for turbo codes using permutation polynomials over integer rings. IEEE Trans. Inform. Theory, vol.51, pp. 101-119, (2005).

      [14] Benedetto S. and Guido M.: Design of parallel concatenated convolutional codes. IEEE Transactions On Communications, vol. 44, no. Five, pp. 591-600, (1996).

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    Sujatha, E., C. Subhas, D., & M. N. Giri Prasad, D. (2018). High performance turbo encoder using mealy FSM state encoding technique. International Journal of Engineering & Technology, 7(2.33), 255-258. https://doi.org/10.14419/ijet.v7i2.33.14163