Development of graphical user interface for open source VLSI digital synthesis tool Qflow

  • Abstract
  • Keywords
  • References
  • PDF
  • Abstract

    There are many tools that are used for simulation in the domain of VLSI technology but none of them are easily accessible. There is a need for Free and open source tools in this stream so as to make them accessible to everyone. There are efficient tools that already exist in open source in VLSI stream but are not used widely because of their command line user interface. Hence, creating a user friendly interface will help many developers and users to work easily. This paper deals with the idea to solve the above issue by creating a Graphical User Interface for the open source VLSI tool called QFlow. Qflow is a tool used in synthesizing a VLSI circuit from the Verilog source code. There are multiple tools integrated with this tool to assure the simulation process. It is a combination of many dependencies that are used for synthesis, placement, layout viewing and routing in a fabrication process. All the independent tools used for the Verilog code simulation are integrated onto a single platform. Qt is used for creating the cross-stage application.

  • Keywords

    VLSI,Qflow ,Qt, Verilog

  • References

      [1] Azzini I, Muresano R & Ratto M, “Dragonfly: a multi-platform parallel toolbox for MATLAB/Octave”, Computer Languages, Systems & Structures, Vol.52, (2018), pp.21-42.

      [2] Zabołotny WM, “Version control friendly project management system for FPGA designs”, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments, (2016).

      [3] Scholz A & Juang JN, “Toward open source CubeSat design”, Acta astronáutica, Vol.115, (2015), pp.384-392.

      [4] Montero MA & Salvadeo PA, “OpenCores® a robust complex network”, 7th Argentine School of Micro-Nanoelectronics, Technology and Applications (EAMTA), 2013, 15-21.

      [5] Abid F, Izeboudjen N, Sahli L, Lazib D, Titri S, Louiz F & Bakiri M, “Opencores based Embedded System on Chip for Network Applications”, Proceedings of the International Conference on Circuits, Systems, Signals, pp.191-196.

      [6] Bolado M, Posadas H, Castillo J, Huerta P, Sanchez P, Sánchez C, Fouren H & Blasco F, “Platform based on open-source cores for industrial applications”, Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004, pp.1014-1019.

      [7] Murali A & Hari Kishore K, “Efficient and high speed key-independent AES-based authenticated encryption architecture using FPGAs”, International Journal of Engineering & Technology, (2017).

      [8] Koch D, Beckhoff C, Wold A & Torresen J, “EasyPR-An easy usable open-source PR system”, International Conference on Field-Programmable Technology, (2013), pp.414-417.

      [9] Beagam KSH, Jayashree R & Khan MA, “A new DC power flow model for Q flow analysis for use in reactive power market”, Engineering Science and Technology, an International Journal, Vol.20, No.2,(2017), pp.721-729.

      [10] Sinha V, Hautvast G, Sonnemans J, de Bliek H, Jalba A & Breeuwer M, “Fast and easy visualization of blood flow patterns in 4D Qflow MRI”, Journal of Cardiovascular Magnetic Resonance, Vol.14, No.1,(2012).




Article ID: 12649
DOI: 10.14419/ijet.v7i1.1.12649

Copyright © 2012-2015 Science Publishing Corporation Inc. All rights reserved.