An improved design of reversible adder/subtractor

  • Authors

    • Gowthami P
    • R V. S. Satyanarayana
    2018-04-03
    https://doi.org/10.14419/ijet.v7i2.12.11275
  • Nanotechnology, Quantum Computing, Reversible Adder/Subtractor, Reversible Logic Gates
  • Reversible logic has gained an importance in the fields such as Quantum computing, DNA computing, Bio informatics, Nanotechnology and Optical computing etc. This paper presents a new design of reversible adder/subtractor circuit. The proposed design has better performance than the existing counterpart in terms of reversible gates, garbage outputs and quantum cost.

     

  • References

    1. [1] Landauer, R. (1961). Irreversibility and heat generation in the computing process. IBM Journal of Research and Development, 5, 183-191.

      [2] Bennett, C.H. (1973). Logical reversibility of Computation. IBM Journal of Research and Development. 17, 525-532.

      [3] Saha, A., & Manna, N. (2007). Digital principles and logic design. Infinity Science Press LLC.

      [4] Anil k, Maini. (2007). Digital electronics: Principles devices and applications. John Wiley & Sons.

      [5] Haghparast, M., Rezazadeh, L., & Seivani V. (2011). Design and Optimization of Nanometric Reversible 4 Bit Numerical Comparator. Middle-East Journal of Scientific Research. 7, 581-584.

      [6] Syed Mostahed Ali Chowdhury. (2003). Reversible logic synthesis for minimization of full-adder circuit. Euromicro Symposium on Digital System Design 2003 Proceedings DSD-03.

      [7] Vasudevan, D. P, Lala, P. K., & Parkerson, J. P. (2004). Online testable reversible logic circuit design using NAND blocks. Proc. Symposium on Defect and Fault Tolerance.

      [8] Parhami, B. (2006). Fault Tolerant Reversible Circuits. Proc. 40th Asilomar Conf. Signals, Systems and Computers, Pacific Grove, CA.

      [9] Haghparast, M., & Navi, K. A. (2008). Novel reversible BCD adder for nanotechnology based systems. American Journal of Applied Sciences, 5, 282-288.

      [10] Rangaraju, H.G., Venugopal, U., Muralidhara, K.N., & Raja, K.B. (2011). Design of efficient reversible parallel Binary adder/subtractor. Springer-Verlag Berlin Heidelberg.

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  • How to Cite

    P, G., & V. S. Satyanarayana, R. (2018). An improved design of reversible adder/subtractor. International Journal of Engineering & Technology, 7(2.12), 182-183. https://doi.org/10.14419/ijet.v7i2.12.11275