Comparison of Scheduling Algorithms in The Design of Fault Tolerant Real Time Systems

  • Abstract
  • Keywords
  • References
  • PDF
  • Abstract

    Most of the real time systems have the timing constraints. The main important timing constraints of any real time systems are to meet the deadlines of its application tasks. Not only satisfying the timing constraints of any real-time system, but also the functional correctness of application needs to be guaranteed. Meeting the dead line of application is no use if it deviates from its precise output. Timing constraints of the system can be satisfied by choosing proper task scheduling algorithms and the reliability of the system can be reached by providing fault-tolerance. In this paper, various fault scheduling algorithms like fixed priority, EDF(Earliest dead line first), LLF (Least Laxity First),Rate monotonic etc have been studied and compare the parameters like Worst-case execution times, response time, task missed deadlines, Number of preemption, number of context switches, Deadlock  and processor utilization factor.


  • Keywords

    Dead line, real time system, scheduling algorithm, reliability ,fault tolerance.

  • References

      [1] Fengxiang Zhang and Alan Burns, September, 2009. Schedulability analysis for real-time systems with EDF scheduling. IEEE Transactions on computers, vol. 58, no. 9.

      [2] Hamid Arabnejad and Jorge G. Barbosa, 2013. List scheduling algorithm for heterogeneous systems by an optimistic cost table. IEEE.

      [3] J. Lehoczky, L. Sha, and Y. Ding, 1989 The rate monotonic scheduling algorithm: Exact characterization and average case behaviour. IEEE Real-Time Systems Symposium, 166-171.

      [4] Peng Li and Binoy Ravindran September, 2004. Fast, Best-Effort Real-Time Scheduling Algorithms. IEEE Transactions on computers, vol. 53, no. 9.

      [5] Luis Bu' rdalo, Andre´s Terrasa, Agustı´n Espinosa, and Ana Garcı´a-Fornes, December, 2012. Analyzing the Effect of Gain Time on Soft-Task Scheduling Policies in Real-Time Systems. IEEE Transactions on software engineering, vol. 38, no. 6.

      [6] Zahereel Ishwar Abdul Khalib , Badlishah R. Ahmad and Ong Bi Lynn Ong, “High deadline meeting rate of nonpreemptive dynamic soft real timescheduling algorithm”,296301,DOI:10.1109/ICCSCE.2012.648715, 2012 IEEE.

      [7] Li, Q. & Ba, W, “A group priority earliest deadline first scheduling algorithm”, Frontiers of Computer Science October 2012, Volume 6, Issue 5, pp 560–567.

      [8] J.Leung and J. Whitehead, “On the complexity of fixedpriority schedulings of periodic, real-time tasks”, Performance Evaluation 2(4):237-250 December 1982.

      [9] R. L. Panigrahi and M .K. Senapaty, “Real Time System for Software Engineering: An Overview”, Global Journal for Research Analysis, Vol. 3, Issue 1, pp. 25-27, January 2014.

      [10] BALA DASTAGIRI, N. and HARI KISHORE, K., 2016. Analysis of low power low kickback noise dynamic comparators in pacemakers. Indian Journal of Science and Technology, 9(44),.

      [11] BALA DASTAGIRI, N. and HARI KISHORE, K., 2016. Reduction of kickback noise in latched comparators for cardiac IMDs. Indian Journal of Science and Technology, 9(43),.

      [12] HUSSAIN, S.N. and KISHORE, K.H., 2016. Computational Optimization of Placement and Routing using Genetic Algorithm. Indian Journal of Science and Technology, 9(47),.

      [13] MUDAVATH, M. and HARIKISHORE, K., 2016. Design of CMOS RF front-end of low noise amplifier for LTE system applications. Asian Journal of Information Technology, 15(20), pp. 4040-4047.

      [14] MURALI, A., KAKARLA, H.K. and VENKAT REDDY, D., 2016. Integrating FPGAs with trigger circuitry core system insertions for observability in debugging process. Journal of Engineering and Applied Sciences, 11(12), pp. 2643-2650.

      [15] BALA GOPAL, P., HARI KISHORE, K., KALYANA VENKATESH, R.R. and HARINATH MANDALAPU, P., 2015. An FPGA implementation of onchip UART testing with BIST techniques. International Journal of Applied Engineering Research, 10(14), pp. 34047-34051.

      [16] BHARADWAJ, M. and KISHORE, H., 2017. Enhanced launch-off-capture testing using BIST design. Journal of Engineering and Applied Sciences, 12(3), pp. 636-643.

      [17] VUNDAVILLI, P.R., PARAPPAGOUDAR, M.B., KODALI, S.P. and BENGULURI, S., 2012. Fuzzy logic-based expert system for prediction of depth of cut in abrasive water jet machining process. Knowledge-Based Systems, 27, pp. 456-464.

      [18] KILARU, S., HARIKISHORE, K., SRAVANI, T., ANVESH CHOWDARY, L. and BALAJI, T., 2014. Review and analysis of promising technologies with respect to Fifth generation networks, 1st International Conference on Networks and Soft Computing, ICNSC 2014 - Proceedings 2014, pp. 248-251.

      [19] "Kolluru V R, Mahapatra K and Sudbudhi B, Real-Time Digital Simulation and Analysis of Sliding Mode and P&O MPPT Algorithms for a PV System, International Journal of Emerging Electric Power SystemsVolume 16, Issue 4, 1 August 2015, Pages 313-322."

      [20] Kolluru V R, Mahapatra K and Sudbudhi B, Development and implementation of control algorithms for a photovoltaic system, Students Conference on Engineering and Systems, SCES 2013, Article number 6547525.

      [21] Kolluru V R, Sarode S S, Patjoshi R K, Mahapatra K and Sudbudhi B, Design and implementation of an optimized sliding mode controller and compared with a conventional MPPT controller for a solar system, WSEAS Transactions on Systems and Control Volume 9, Issue 1, 2014, Pages 558-565




Article ID: 10893
DOI: 10.14419/ijet.v7i2.7.10893

Copyright © 2012-2015 Science Publishing Corporation Inc. All rights reserved.