FPGA based asymmetric crypto system design

  • Abstract
  • Keywords
  • References
  • PDF
  • Abstract

    In the network security system cryptography plays a vital role for the secure transmission of information. Cryptography is a process of integrating and transferring the data to the genuine users against any attacks. There are two types of Cryptographic algorithm: Symmetric and Asymmetric algorithms. In the symmetric type cryptography, single key is used for both encryption and decryption. Symmetric algorithms are fast and simple. Asymmetric cryptographic algorithm uses different keys such as public key to encrypt the message at sender and private key which is known only to receiver for decrypting the encrypted message. Asymmetric algorithms are more secure and difficult, to decrypt the message unless hacker acquires the knowledge of private key. A new Asymmetric algorithm with Error Detection and Correction mechanism is proposed that can reduce hardware, and improves decryption time and security. Proposed Asymmetric algorithm uses the few properties of: RSA, Diffie-Hellman and ElGamal Algorithms. Performance of asymmetric algorithms is compared with proposed algorithm, which is designed using Verilog HDL. Algorithms are synthesized, simulated, implemented using Vivado and targeted for Artix-7 XC7A100T-1CSG324Carchitecture.Chipscope Pro logic analyzer-Virtual Input Output core is binded to design for hardware debugging, to monitor and capture the output signals at selected specified state by applying random input stimuli at runtime in Nexys4 DDR FPGA Board.

  • Keywords


  • References

      [1] Krishna BM, Habibulla Khan GL, Lohitha B, Bhavitha E, Sri PT & Kumar BA, “FPGA Implementation of DNA Based AES Algorithm For Cryptography Applications”, International Journal of Pure and Applied Mathematics, Vol.115, No.7 , (2017), pp.525-530.

      [2] Krishna BM, Khan H & Madhumati GL, “Reconfigurable pseudo biotic key encryption mechanism for cryptography applications”, International Journal of Engineering & Technology, Vol.7, No.1.5, (2017), pp.62-70.

      [3] Krishna BM, Khan H, Madhumati G, Kumar KP, Tejaswini G, Srikanth M & Ravali P, “FPGA Implementation OF DES Algorithm Using DNA Cryptography”, Journal of Theoretical and Applied Information Technology, Vol.95, No.10, (2017), pp.2147-2158.

      [4] Krishna BM, Madhumati, GL, Ganesh MSR, Bhargav Y, Krishna VMV & Kumar OM, “Biometric Based Industrial Machine Access Control System Using FPGA”, Journal of Theoretical and Applied Information Technology, Vol.79, No.1,(2015).

      [5] Krishna BM, Madhumati GL & Khan H, “Design of Dynamically Reconfigurable Input/Output Peripheral Based Wireless System”, Indian Journal of Science and Technology, Vol.9, No.30, (2016), pp.1-9.

      [6] Krishna BM, Madhumati G & Khan H, “Dynamically Evolvable Hardware-Software Co-Design Based Crypto System Through Partial Reconfiguration”, Journal of Theoretical & Applied Information Technology, Vol.95, No.10, (2017), pp. 2159-2169.

      [7] Krishna BM, Madhumati GL & Khan H, “FPGA Implementation Of Partially Reconfigurable DNA Cryptography Methods Through Wireless Using Zigbee”, ARPN Journal of Engineering and Applied Sciences, Vol.11, No.21, (2006), pp.12514-12522.

      [8] Beebe NH, “A Bibliography of Publications in Computer Networks and ISDN Systems”, Journal of Advanced Research in Dynamical and Control Systems, Vol.9, (2014), pp.1566-1586.

      [9] Krishna BM, Nayak VN, Alekhya PDS, Sree KS, Dhruvitha M & Yashwanth V, “FPGA implementation of DNA based S-DES cryptography technique”, International Journal of Pure and Applied Mathematics, Vol.115, (1994), pp.233-239.

      [10] Krishna BM, Chowdary GR, Vardhan GC, Ram KS, Kishore P, Madhumati GL & Khan H, “FPGA based wireless electronic security system with sensor interface through GSM”, Journal of Theoretical & Applied Information Technology, Vol.89, No.2, (2016), pp.489-494.

      [11] Rao IRSN, Krishna BM, Shameem S, Khan H & Madhumati GL, “Wireless Secured Data Transmission using Cryptographic Techniques through FPGA”, International Journal of Engineering and Technology (IJET), (2016), pp.0975-4024.

      [12] Chowdary MU, Krishna BM, Madhumati KMG & Khan H, “ZigBee Based Wireless Data Transmission with LDPC codes using FPGA”, International Journal of Engineering and Technology, Vol.8, No.2, (2016), pp.653-659.

      [13] Reddy AG, Das AK, Yoon EJ & Yoo KY, “A secure anonymous authentication protocol for mobile services on elliptic curve cryptography”, IEEE Access, Vol.4, (2016), pp.4394-4407.

      [14] Wu Z, Su D & Ding G, “ElGamal algorithm for encryption of data transmission”, International Conference on Mechatronics and Control (ICMC), (2014), pp.1464-1467.

      [15] Chen C, Wang T, Kou Y, Chen X & Li X, “Improvement of trace-driven I-Cache timing attack on the RSA algorithm”, Journal of Systems and Software, Vol.86, No.1, (2013), pp.100-107.

      [16] Wang CH, Chuang CL & Wu CW, “An efficient multimode multiplier supporting AES and fundamental operations of public-key cryptosystems”, IEEE transactions on very large scale integration (VLSI) systems, Vol.18, No.4, (2010), pp.553-563.

      [17] Wang D, Jiang Y, Song H, He F, Gu M & Sun J, “Verification of Implementations of Cryptographic Hash Functions”, IEEE Access, Vol.5, (2017), pp.7816-7825.

      [18] Imamoto K & Sakurai K, “Design and Analysis of Diffie-Hellman-Based Key Exchange Using One-time ID by SVO Logic”, Electronic Notes in Theoretical Computer Science, Vol.135, No.1, (2005), pp.79-94.




Article ID: 10788
DOI: 10.14419/ijet.v7i1.1.10788

Copyright © 2012-2015 Science Publishing Corporation Inc. All rights reserved.