Reconfigurable Architectures
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Abstract
In the area of computer architecture, designers are faced with the trade-of between flexibility and performance. The architectural choices span a wide spectrum, with general-purpose processors and application specific integrated circuits (ASICs) at opposite ends. General-purpose processors are not optimized to specific applications; they are flexible due to their versatile instruction sets that allow the implementation of every computable task. ASICs are dedicated hardware devices that can achieve higher performance, require less silicon area, and are less power-consuming than instruction-level programmable processors. However, they lack in flexibility. Reconfigurable computer architectures promise to overcome this traditional trade-off and achieve both, the high performance of ASICs and the flexibility of general-purpose processors.References
[1] Christophe Bobde, “Introduction to Reconfigurable Computing,” Springer, (2007).
[2] K .Hwang, “Advanced computer architecture,” McGraw-Hill, (1993).
[3] R. Hartenstein, “Basics of reconfigurable computing,” Springer, (2007), pp. 451-501.
[4] Stephen Brown, and Jonathan Rose, “Architecture of FPGAs and CPLDs: A Tutorial,”Available at http://www.eecg.toronto.edu/~jayar/pubs/brown/ survey pdf.
[5] T. J. Todman, G.Constantinides, O.Mender, and P. Cheung, “Reconfigurable computing: architectures and design methods,” Proceedings of the IEE - Computers and Digital Techniques, Vol. 152, No. 2, (2005), pp. 193-207.
View more references (9)
[6] D.A Buell and Kenneth, L. Pocek, “An introduction to custom computing machines,” The Journal of Super Computing, Vol. 9, No. 3, (1995), pp. 219-230.
[7] R. Hartenstein, “A decade of reconfigurable computing,” Proceedings, Conference on Design, Automation and Test in Europe, Munich, Germany, (2001), pp. 642-649.
[8] R. Hartenstein, H. Grünbacher, “The Roadmap to reconfigurable computing ,” Proceedings of the 10th International Conference on Field- Programmable Logic and Applications, Springer Verlag, Heidelberg, Lecture Notes in Computer Science, Villach, Austria, Vol. LNCS 1896, (FPL 2000).
[9] R. Hartenstein, “Morphware and Configware,” Springer, (2006).
[10] K. Compton, S. Hauck, “Configurable computing: A survey of systems and software,” Northwestern University, Dept. of ECE Technical Report, (1999), pp. 1-2.
[11] Stamatis, Vassiliadis, D. Soudris, “Fine and course grained reconfigurable computing,” Springer, (2007).
[12] S. Hauck, “The role of FPGAs in reprogrammable systems,” Proceedings of the IEEE Vol. 86, No. 4, (1998), pp. 615-638.
[13] R. Hartenstein, “Course grained reconfigurable architectures,” Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, (2001), pp. 564-570.
[14] S. Hauck and A. Dehon, “Reconfigurable Computing: The theory and practice of FPGA-Based computation,” Morgan Kaufmann Series in Systems on Silicon, (2008).