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IJET International Journal of Engineering and Technology E-ISSN 2227-524X

Low Power and High Speed D-Latch Circuit Designs Based on Carbon Nanotube FET

Authors and Affiliations

  • Neda Talebipoor electronic engineering department,IA University,science and research branch branch,kerman,iran;
  • Peiman Keshavarzian head of computer engineering department,IA University,kerman branch,kerman,iran;
  • Behzad Irannejad

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Abstract

In this paper we propose low power and high speed D-latche circuits base on carbon nanotube field effect transistor. D-latches are the important state-holding elements and systems performance enhancement will be achieved by improving the flip-flop latches structure. The circuit designs are simulated by Hspice .In this paper the consumption result of the circuit parameters such as delay, power and PDP for our three different D-latch circuit design in various voltages and different temperatures.

References

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How to Cite

Talebipoor, N., Keshavarzian, P., & Irannejad, B. (2012). Low Power and High Speed D-Latch Circuit Designs Based on Carbon Nanotube FET. International Journal of Engineering and Technology, 2(1), 12-16. https://doi.org/10.14419/ijet.v2i1.483