Mitigation of Unbalanced Voltage Sags and Swells of Power System in Utility Side by using Sen Transformer

  • Authors

    • Loveswara Rao Burthi
    • P S.Prema Kumar
    2018-04-25
    https://doi.org/10.14419/ijet.v7i2.24.12062
  • Sen Transformers (ST) Unbalanced Voltage sag Voltage swell Control logic Unbalance Mitigation

  • Majority of the industrial electrical loads requires balanced three phase supply but in reality there is unbalanced supply due to single phase loads like railway tracks etc.increasing use of non linear loads in modern power distribution network there are some power quality issues like voltage sags and voltage swells, this distortion of the power supply effect the loads which are connected to power distribution network. In order to improve quality of the power, in this paper a Sen Transformer (ST) technique as been proposed to minimize unbalanced voltage sags and swells. The proposed technique mitigates both voltage sag and swell during balanced and unbalanced operating conditions. The proposed ST consists of a programmable tap controller to compensate ride through faults in power system network. The proposed work as been implemented using MATLAB/SIMULINK software. To validate the proposed work, simulation results are presented.

     

     

  • References

    1. [1] O. Souto, J. Oliveira, and L. Neto, , "Induction motors thermal behavior and life expectancy under non ideal supply conditions," in IX Int. Conf. Harmonics and Quality of Power, Orlando, FL, 2000.
      [2] Rajesh Damaraju, S.V.N.L. Lalitha. "A Fuzzy Controller for Compensation of Voltage SAG/SWELL Problems Using Reduced Rating Dynamic Voltage Restorer" TELKOMNIKA Indonesian Journal of Electrical Engineering VOL. 15, No 3: September 2015, pg no: 407-414.
      [3] S.N.V.Ganesh, K.Ramesh Reddy, B.V.Shankar Ram. "Comparison of different control strategy basedon pole placement for cascade multilevelinverter based dynamic voltage restorer" in Journal of Electrical Systems, VOL.10, No.1, March 2010.
      [4] Dileep Kumar Varma, Y. P. Obulesh, Ch. Sai Babu. "Decoupled Feed Forward Voltage Oriented Controller for DFIG under Balanced and Unbalanced Fault Conditions" TELKOMNIKA Indonesian Journal of Electrical Engineering VOL. 15, No 2: August 2015, pg no: 209-216.
      [5] Omer Elfaki Elbashir, Wang Zezhong, Liu Qihui. "Behavior of DFIG Wind Turbine during Unbalanced Grid Voltage" TELKOMNIKA Indonesian Journal of Electrical Engineering VOL. 12, No 7: July 2014, pg no: 4934-4943.
      [6] Kalyan K. Sen and Mey Ling Sen., "Introducing the Family of "Sen" Transformers: A Set of Power Flow Controlling Transformers" in IEEE Transactions on Power Delivery, VOL. 18, NO. 1, JANUARY 2003.
      [7] M. Omar Faruque and Venkata Dinavahi., "A Tap-Changing Algorithm for the Implementation of "Sen" Transformer" in IEEE Transactions on Power Delivery, VOL. 22, NO. 3, JULY 2007
      [8] Raju Jayaraman, Kowslaya M. ''Evolve the Controller for Static Synchronous Series Compensator Based on Control Strategy of Sen Transformer' IJPEDS Vol 4, No 1: March 2014, pg no: 127-136.
      [9] M. Omar Faruque, Student Member, IEEE, and Venkata Dinavahi, Member, IEEE: "Detailed Real-Time Transient Model of the "Sen" Transformer". IEEE transactions on power delivery, vol. 23, no. 3, July 2008.
      [10] Burthi Loveswara Rao and P. Linga Reddy., "An LVRT Solution for DFIG Wind Turbine during Symmetrical Grid Fault by using "Sen" Transformer" in Indian Journal of Science and Technology, Vol 8(36), DOI: 10.17485/ ijst/2015/v8i36/71809, December 2015.
      [11] Loveswara Rao.Burthi, P. Linga Reddy and B.L.N.V.S.K.Siva Prakash., "An Active Dynamic LVRT Solution for Balanced and Unbalanced Grid Faults in a Power System by Using "Sen" Transformer" in 2014 Annual IEEE India Conference (INDICON)
      [12] Burthi LR and Lingareddy P, "Comparison of "sen" transformer with dvr for lvrt solution of dfig wind turbine" in Journal of Electrical Engineering, www.jee.ro 2016 March; edition-16, Vol.1: P1-8.
      [13] Bollen M. H. J., Understanding power quality problems - voltage sags and interruptions, IEEE Press Series on Power Engineering, 2000.
      [14] R. Echavarr?a, A. Claudio, and M. Cotorogea, "Analysis, Design, and Implementation of a Fast On-Load Tap Changing Regulator" in Proc. IEEE Power Electron.vol.22, no.3, pp.527-534, March- 2007.
      [15] Y.Kusuma Latha, Ch.Saibabu, and Y.P.Obulesu ''Unified Power Quality Conditioner for Voltage Sag and Harmonic Mitigation of Nonlinear Loads' IJPEDS Vol .1, No 1: September 2011, pg no: 65-74.
      [16] Avinash Yadlapati, Dr. Hari Kishore Kakarla, "An Advanced AXI Protocol Verification using Verilog HDL", Wulfenia Journal, ISSN: 1561-882X, Volume 22, Number 4, pp. 307-314, April 2015
      [17] P Ramakrishna, K. Hari Kishore, "Design of Low Power 10GS/s 6-Bit DAC using CMOS Technology "International Journal of Engineering and Technology (UAE), ISSN No: 2227-524X, Vol No: 7, Issue No: 1.5, Page No: 226-229, January 2018.
      [18] A Murali, K. Hari Kishore, "Efficient and High Speed Key Independent AES Based Authenticated Encryption Architecture using FPGAs "International Journal of Engineering and Technology(UAE), ISSN No: 2227-524X, Vol No: 7, Issue No: 1.5, Page No: 230-233, January 2018.
      [19] G.S.Spandana, K Hari Kishore "A Contemporary Approach For Fault Diagnosis In Testable Reversible Circuits By Employing The CNT Gate Library" International Journal of Pure and Applied Mathematics, ISSN No: 1314-3395, Vol No: 115, Issue No: 7, Page No: 537-542, September 2017.
      [20] K Hari Kishore, CVRN Aswin Kumar, T Vijay Srinivas, GV Govardhan, Ch Naga Pavan Kumar, R Venkatesh "Design and Analysis of High Efficient UART on Spartran-6 and Virtex-7 Devices", International Journal of Applied Engineering Research, ISSN 0973-4562, Volume 10, Number 09 , pp. 23043-23052, June 2015
      [21] K Bindu Bhargavi, K Hari Kishore "Low Power BIST on Memory Interface Logic", International Journal of Applied Engineering Research, ISSN 0973-4562, Volume 10, Number 08 , pp. 21079-21090, May 2015.
      [22] Korraprolu Brahma Reddy, K Hari Kishore, "A Mixed Approach for Power Dissipation Reduction in Nanometer CMOS VLSI circuits", International Journal of Applied Engineering Research, ISSN 0973-4562 Volume 9, Number 18 , pp. 5141-5148, July 2014.
      [23] Nidamanuri Sai Charan, Kakarla Hari Kishore "Reorganization of Delay Faults in Cluster Based FPGA Using BIST" Indian Journal of Science and Technology, ISSN No: 0974-6846, Vol No.9, Issue No.28, page: 1-7, July 2016.
      [24] Sravya Kante, Hari Kishore Kakarla, Avinash Yadlapati,"Design and Verification of AMBA AHB-Lite protocol using Verilog HDL" International Journal of Engineering and Technology, E-ISSN No: 0975-4024, Vol No.8, Issue No.2, Page:734-741, April-May 2016.
      [25] Bandlamoodi Sravani, K Hari Kishore, "An FPGA Implementation of Phase Locked Loop (PLL)", International Journal of Applied Engineering Research, ISSN 0973-4562, Volume 10, Number 14 , pp. 34137-34139, August 2015
      [26] Avinash Yadlapati, Kakarla Hari Kishore,"Constrained Level Validation of Serial Peripheral Interface Protocol", Proceedings of the First International Conference on SCI 2016, Volume 1, Smart Computing and Informatics, Smart Innovation, Systems and Technologies 77, ISSN No: 2190-3018, ISBN: 978-981-10-5544-7, Chapter No: 77, pp. 743-753, 25th December 2017.
      [27] P Kiran Kumar, P Prasad Rao, Kakarla Hari Kishore, "Optimal Design of Reversible Parity Preserving New Full Adder / Full Subtractor", IEEE SPONSORED 3rd INTERNATIONAL CONFERENCE ON ELECTRONICS AND COMMUNICATION SYSTEMS (ICECS 2016), pp. 3465-3470, 25th and 26th February 2016.
      [28] Y Avinash, K Hari Kishore ''Designing Asynchronous FIFO for Low Power DFT Implementation'' International Journal of Pure and Applied Mathematics, ISSN No: 1314-3395, Vol No: 115, Issue No: 8, Page No: 561-566, September 2017
      [29] Mahesh Mudavath and K Hari Kishore "Design of RF Front End CMOS Cascade CS Low Noise Amplifier on 65nm Technology Process" International Journal of Pure and Applied Mathematics, ISSN No: 1314-3395, Vol No: 115, Issue No: 7, Page No: 417-422, September 2017.
      [30] P. Sahithi K Hari Kishore, E Raghuveera, P. Gopi Krishna "DESIGN OF VOLTAGE LEVEL SHIFTER FOR POWER-EFFICIENT APPLICATIONS USING 45nm TECHNOLOGY" International Journal of Engineering and Technology(UAE), ISSN No: 2227-524X, Vol No: 7, Issue No: 2.8, Page No: 103-108, March 2018.
      [31] N Bala Dastagiri K Hari Kishore "A 14-bit 10kS/s Power Efficient 65nm SAR ADC for Cardiac Implantable Medical Devices" International Journal of Engineering and Technology(UAE), ISSN No: 2227-524X, Vol No: 7, Issue No: 2.8, Page No: 34-39, March 2018.
      [32] Dr. Seetaiah Kilaru, Hari Kishore K, Sravani T, Anvesh Chowdary L, Balaji T "Review and Analysis of Promising Technologies with Respect to fifth Generation Networks", 2014 First International Conference on Networks & Soft Computing, ISSN:978-1-4799-3486-7/14,pp.270-273,August2014.
      [33] Meka Bharadwaj, Hari Kishore "Enhanced Launch-Off-Capture Testing Using BIST Designs" Journal of Engineering and Applied Sciences, ISSN No: 1816-949X, Vol No.12, Issue No.3, page: 636-643, April 2017.
      [34] P Bala Gopal, K Hari Kishore, R.R Kalyan Venkatesh, P Harinath Mandalapu "An FPGA Implementation of On Chip UART Testing with BIST Techniques", International Journal of Applied Engineering Research, ISSN 0973-4562, Volume 10, Number 14 , pp. 34047-34051, August 2015
      [35] A Murali, K Hari Kishore, D Venkat Reddy "Integrating FPGAs with Trigger Circuitry Core System Insertions for Observability in Debugging Process" Journal of Engineering and Applied Sciences, ISSN No: 1816-949X, Vol No.11, Issue No.12, page: 2643-2650, December 2016.
      [36] Mahesh Mudavath, K Hari Kishore, D Venkat Reddy "Design of CMOS RF Front-End of Low Noise Amplifier for LTE System Applications Integrating FPGAs" Asian Journal of Information Technology, ISSN No: 1682-3915, Vol No.15, Issue No.20, page: 4040-4047, December 2016.
      [37] N Bala Dastagiri, Kakarla Hari Kishore "Reduction of Kickback Noise in Latched Comparators for Cardiac IMDs" Indian Journal of Science and Technology, ISSN No: 0974-6846, Vol No.9, Issue No.43, Page: 1-6, November 2016.
      [38] S Nazeer Hussain, K Hari Kishore "Computational Optimization of Placement and Routing using Genetic Algorithm" Indian Journal of Science and Technology, ISSN No: 0974-6846, Vol No.9, Issue No.47, page: 1-4, December 2016.
      [39] N Bala Dastagiri, K Hari Kishore "Analysis of Low Power Low Kickback Noise in Dynamic Comparators in Pacemakers" Indian Journal of Science and Technology, ISSN No: 0974-6846, Vol No.9, Issue No.44, page: 1-4, November 2016.
      [40] Shaik Razia, P.Swathi Pryathyusha, N.Vamsi Krishna "A Comparative study of machine learning algorithms on thyroid disease prediction" International Journal of Engineering and Technology(UAE), ISSN No: 2227-524X, Vol No: 7, Issue No: 2.8, Page No: 315-319, March 2018
      [41] S RAZIA, A REVIEW ON DISEASE DIAGNOSIS USING MACHINE LEARNING TECHNIQUES, International Journal of Pure and Applied Mathematics, ISSN No: 1314-3395, Vol No: 117, Issue No: 16, Page No: 79-85, 2017
      [42] S Razia, MR Narasingarao, GR Sridhar, "A decision support system for prediction of thyroid disease-a comparison of multilayer perception neural network and radial basis function neural network", Journal of Theoretical and Applied Information Technology, ISSN 1992-8645, Volume 80, No. 3 , pp. 544, 2015
      [43] SHAIK RAZIA, M.R.Narasingarao, "Development and Analysis of Support Vector Machine Techniques for Early Prediction of Breast Cancer and Thyroid" Journal of Advanced Research in Dynamical and Control Systems, ISSN: 1943-023X, Vol.9.Sp.Issue:6, page no: 869-878, 2017.
      [44] S.V.Manikanthan and T.Padmapriya "Recent Trends In M2m Communications In 4g Networks And Evolution Towards 5g", International Journal of Pure and Applied Mathematics, ISSN NO: 1314-3395, Vol-115, Issue -8, Sep 2017.
      [45] S.V. Manikanthan, T. Padmapriya "An enhanced distributed evolved node-b architecture in 5G tele-communications network" International Journal of Engineering & Technology (UAE), Vol 7 Issues No (2.8) (2018) 248-254.March2018.
      [46] S.V. Manikanthan, T. Padmapriya, Relay Based Architecture For Energy Perceptive For Mobile Adhoc Networks, Advances and Applications in Mathematical Sciences, Volume 17, Issue 1, November 2017, Pages 165-179

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    Rao Burthi, L., & S.Prema Kumar, P. (2018). Mitigation of Unbalanced Voltage Sags and Swells of Power System in Utility Side by using Sen Transformer. International Journal of Engineering & Technology, 7(2.24), 267-273. https://doi.org/10.14419/ijet.v7i2.24.12062