FPGA Prototyping of Micro-Blaze soft-processor based Multi-core System on Chip

  • Authors

    • G Prasad Acharya
    • M Asha Rani
    2018-04-12
    https://doi.org/10.14419/ijet.v7i2.16.11416
  • Multi-core System-on-chip, FPGA, Micro-Blaze, IP integrator

  • The increased demand for processor-level parallelism has many-folded the challenges for SoC designers to design, simulate and verify/validate today’s Multi-core System-On-Chip (SoC) due to the increased system complexity. There is also a need to reduce the design cycle time to produce a complex multi-core SOC system thereby the product can be brought into the market within an affordable time. The Computer-Aided Design (CAD) tools and Field Programmable Gate Arrays (FPGAs) provide a solution for rapidly prototyping and validating the system. This paper presents an implementation of multi-core SoC consisting of 6 Xilinx Micro-Blaze soft-core processors integrated to the Zynq Processing System (PS) using IP Integrator and these cores will be communicated through AXI bus. The functionality of the system is verified using Micro-Blaze system debugger. The hardware framework for the implemented system is implemented and verified on FPGA.

     

     

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  • How to Cite

    Prasad Acharya, G., & Asha Rani, M. (2018). FPGA Prototyping of Micro-Blaze soft-processor based Multi-core System on Chip. International Journal of Engineering & Technology, 7(2.16), 57-60. https://doi.org/10.14419/ijet.v7i2.16.11416