Dutta, Umesh, M K. Soni, and Manisha Pattanaik. “Design & Optimization of Gate-All-Around Tunnel FET for Low Power Applications”. International Journal of Engineering and Technology 7, no. 4 (September 17, 2018): 2263–2270. Accessed February 9, 2026. https://www.sciencepubco.com/index.php/IJET/article/view/12352.