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Gorabal, A. and D K, N. 2018. FPGA Implementation of UART with Single Error Correction and Double Error Detection (UART-SEC-DED).
International Journal of Engineering and Technology. 7, 3.12 (Jul. 2018), 23–27
. DOI:https://doi.org/10.14419/ijet.v7i3.12.15856.